Cypress Semiconductor /psoc63 /BLE /BLELL /ADV_INTR

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Interpret as ADV_INTR

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (ADV_STRT_INTR)ADV_STRT_INTR 0 (ADV_CLOSE_INTR)ADV_CLOSE_INTR 0 (ADV_TX_INTR)ADV_TX_INTR 0 (SCAN_RSP_TX_INTR)SCAN_RSP_TX_INTR 0 (SCAN_REQ_RX_INTR)SCAN_REQ_RX_INTR 0 (CONN_REQ_RX_INTR)CONN_REQ_RX_INTR 0 (SLV_CONNECTED)SLV_CONNECTED 0 (ADV_TIMEOUT)ADV_TIMEOUT 0 (ADV_ON)ADV_ON 0 (SLV_CONN_PEER_RPA_UNMCH_INTR)SLV_CONN_PEER_RPA_UNMCH_INTR 0 (SCAN_REQ_RX_PEER_RPA_UNMCH_INTR)SCAN_REQ_RX_PEER_RPA_UNMCH_INTR 0 (INIT_ADDR_MATCH_PRIV_MISMATCH_INTR)INIT_ADDR_MATCH_PRIV_MISMATCH_INTR 0 (SCAN_ADDR_MATCH_PRIV_MISMATCH_INTR)SCAN_ADDR_MATCH_PRIV_MISMATCH_INTR

Description

Advertising interrupt status and Clear register

Fields

ADV_STRT_INTR

If this bit is set it indicates a new advertising event started after interval expiry. Write to the register with this bit set to 1, clears the interrupt source.

ADV_CLOSE_INTR

If this bit is set it indicates current advertising event is closed. Write to the register with this bit set to 1, clears the interrupt source.

ADV_TX_INTR

If this bit is set it indicates ADV packet is transmitted. Write to the register with this bit set to 1, clears the interrupt source.

SCAN_RSP_TX_INTR

If this bit is set it indicates scan response packet transmitted in response to previous scan request packet received. Write to the register with this bit set to 1, clears the interrupt source.

SCAN_REQ_RX_INTR

If this bit is set it indicates scan request packet received. Write to the register with this bit set to 1, clears the interrupt source.

CONN_REQ_RX_INTR

If this bit is set it indicates connect request packet is received. Write to the register with this bit set to 1, clears the interrupt source.

SLV_CONNECTED

If this bit is set it indicates that connection is created as slave. Write to the register with this bit set to 1, clears the interrupt source. Note: On a slave connection creation, the link layer cannot enter deepsleep mode in the same slot . It can enter deepsleep mode only in the subsequent slots.

ADV_TIMEOUT

If this bit is set it indicates that the directed advertising event has timed out after 1.28 seconds. Applicable in adv_direct_ind advertising. Write to the register with this bit set to 1, clears the interrupt source.

ADV_ON

Advertiser procedure is ON in hardware. Indicates that advertiser procedure is ON in hardware. 1 - ON 0 - OFF

SLV_CONN_PEER_RPA_UNMCH_INTR

If this bit is set it indicates that connection is created as slave, but the peer device Resolvable Private Address is not resolved/ ID or NRPA are not matched yet. If the address is not resolved prior to connection establishment, the connection will be terminated. Write to the register with this bit set to 1, clears the interrupt source. This bit is valid only if PRIV_1_2 and PRIV_1_2_ADV are set.

SCAN_REQ_RX_PEER_RPA_UNMCH_INTR

If this bit is set it indicates scan request packet received, but the peer device Resolvable Private Address is not resolved/ ID or NRPA are not matched yet. Write to the register with this bit set to 1, clears the interrupt source. This bit is valid only if PRIV_1_2 and PRIV_1_2_ADV are set.

INIT_ADDR_MATCH_PRIV_MISMATCH_INTR

If this bit is set it indicates that an Identity address is received from a Scanner and matches an entry in the resolving list, but peer IRK is set and hence a corresponding RPA is expected from the Scanner Write to the register with this bit set to 1, clears the interrupt source. This bit is valid only if PRIV_1_2 and PRIV_1_2_ADV are set.

SCAN_ADDR_MATCH_PRIV_MISMATCH_INTR

If this bit is set it indicates that an Identity address is received from an initiator and matches an entry in the resolving list, but peer IRK is set and hence a corresponding RPA is expected from the initiator Write to the register with this bit set to 1, clears the interrupt source. This bit is valid only if PRIV_1_2 and PRIV_1_2_ADV are set.

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